Device Exploration of NanoSheet Transistors for Sub-7-nm Technology Node

Doyoung Jang, Dmitry Yakimets, Geert Eneman, +6

IEEE Transactions on Electron Devices

Device ModelingNanowire TransistorsElectrical EngineeringIntrinsic PerformanceEngineering +11

The Complementary FET (CFET) for CMOS scaling beyond N3

Julien Ryckaert, P. Schuddinck, Pieter Weckx, +13

Finfet DeviceEngineeringVlsi DesignComputer ArchitectureComplementary Fet +16

Ultrathin high-K gate stacks for advanced CMOS devices

E. P. Gusev, D. A. Buchanan, E. Cartier, +20

EngineeringVlsi DesignSilicon On InsulatorSemiconductor DeviceNanoelectronics +14

Extreme scaling with ultra-thin Si channel MOSFETs

B. Doris, M. Ieong, T. Kanarsky, +16

Electrical EngineeringEngineeringTechnology ScalingNanoelectronicsApplied Physics +6

Characteristics and device design of sub-100 nm strained Si N- and PMOSFETs

K. Rim, J. O. Chu, H. Chen, +16

Electrical EngineeringEngineeringStrained Si DevicesNanoelectronicsBias Temperature Instability +9

Power aware FinFET and lateral nanosheet FET targeting for 3nm CMOS technology

Dmitry Yakimets, M. Garcia Bardon, Doyoung Jang, +9

Low-power ElectronicsPower Aware FinfetElectrical EngineeringLateral Nanosheet FetEngineering +13

Self-heating on bulk FinFET from 14nm down to 7nm node

Doyoung Jang, E. Bury, R. Ritzenthaler, +9

Device ModelingScaled Bulk FinfetsElectrical EngineeringBulk FinfetEngineering +12

Strained Si CMOS (SS CMOS) technology: opportunities and challenges

K. Rim, Robert E. Anderson, D. Boyd, +23

Solid-State Electronics

Electrical EngineeringEngineeringNanoelectronicsApplied PhysicsSi Cmos +4

Low field mobility characteristics of sub-100 nm unstrained and strained Si MOSFETs

K. Rim, M. Longstreet, A. Mocuta, +1

Electrical EngineeringEngineeringNanoelectronicsBias Temperature InstabilityApplied Physics +7

Extreme scaling enabled by 5 tracks cells: Holistic design-device co-optimization for FinFETs and lateral nanowires

M. Garcia Bardon, Yasser Sherazi, P. Schuddinck, +14

Low-power ElectronicsHolistic Design-device Co-optimizationElectrical EngineeringNanoscale SystemEngineering +13