Olivier Bonnin

Low leakage and low variability Ultra-Thin Body and Buried Oxide (UT2B) SOI technology for 20nm low power CMOS and beyond

F. Andrieu, O. Weber, J. Mazurier et al. · 2010 · 103 citations

Engineering, Vlsi Design, Integrated Circuits +16

A novel low-voltage biasing scheme for double gate FBC achieving 5s retention and 10<sup>16</sup> endurance at 85°C

Zhichao Lu, Nadine Collaert, M. Aoulaiche et al. · 2010 · 21 citations

Low-power Electronics, Electrical Engineering, Double Gate Fbc +9

Ultrathin (5nm) SiGe-On-Insulator with high compressive strain (−2GPa): From fabrication (Ge enrichment process) to in-depth characterizations

F. Glowacki, C. Le Royer, Y. Morand et al. · Solid-State Electronics · 2014 · 18 citations

Materials Science, Electrical Engineering, Engineering +8

Atomic Scale Thickness Control of SOI Wafers for Fully Depleted Applications

W. Schwarzenbach, Nicolas Daval, Vincent Barec et al. · ECS Transactions · 2013 · 16 citations

Soi Wafers, Engineering, Integrated Circuits +19

Single-wafer/mini-batch approach for fast cycle time in advanced 300-mm fab

Olivier Bonnin, Dominique Mercier, Davide Levy et al. · IEEE Transactions on Semiconductor Manufacturing · 2003 · 11 citations

Electrical Engineering, Wafer Scale Processing, Engineering +15