IEEE Transactions on Nuclear Science · 2019 · 13 citations · 19 references
EngineeringComputer EngineeringElectrical EngineeringFault ToleranceFault-tolerant ComputingMicroelectronicsClock ManagementDetector TechnologyDigital Signal ProcessingSelf-checking CircuitsClock Data RecoveryClock Management UnitsClock RecoveryError State ManagementPhase-locked LoopsThreshold Selection
A hardened phase frequency detector (PFD) employing double-loop self-sampling technology is proposed for clock and data recovery. The PFD can remove the error state and maintain the correct state by the use of the sampler. The laser experiment shows that the threshold value of the proposed PFD has been greatly improved.
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