Factor Analysis of Plasma-Induced Damage in Bulk FinFET Technology

Abstract

In this letter, factor analysis is employed to investigate the hidden dependencies and correlations of plasma-induced damage with other FEOL and BEOL parameters in bulk FinFET technology. First, the test structures are described and the amount of threshold voltage shift resulting from plasma damage is characterized. Next, the different parameters considered are listed and extracted. Finally, they are correlated to the amount of damage inflicted to the transistors using statistical reduction and factor analysis. It is found that the communality of the shift with the parameters considered may partly explain the degraded variability of plasma damaged MOSFET devices.