An air spacer technology for improving short-channel immunity of MOSFETs with raised source/drain and high-/spl kappa/ gate dielectric

Abstract

An air-spacer technology with raised source/drain (S/D) for ultrathin-body (UTB) silicon-on-insulator MOSFETs is developed. The results show that the poly raised S/D can effectively reduce the series resistance and the air spacer can effectively reduce the fringing capacitance. The air spacer is particularly useful when combined with high-/spl kappa/ gate dielectric. The improved device characteristics are demonstrated experimentally and by extensive two-dimensional device simulation.