IEEE Transactions on Electron Devices · 2012 · 11 citations · 21 references
EngineeringMaterials EngineeringMaterials ScienceMicroelectronicsSemiconductor DevicesSemiconductor MaterialsCarrier TransportDevice ModelingMemory DevicesNanoelectronicsSemiconductor Device MaterialsSemiconductor PhysicsActivation EnergyCharge TrappingElectron TunnelingMemory Window OptimizationNanocrystalsNanoelectronic Memory DevicesNonvolatile Memory DevicesSilicon Nanocrystals
In this paper, memory devices integrating a double layer of silicon nanocrystals (Si-ncs) as a trapping medium and a HfAlO-based control dielectrics are presented. We will show that the use of two stacked Si-nc layers significantly improves the memory window compared with the single Si-nc layer devices, without introducing anomalies on the charging dynamics. Then, we also evaluate the potential use of a hybrid Si-nc double-layer/SiN layer charge trapping stack. These devices show a good memory window in a Fowler-Nordheim (FN)/FN mode and a good retention (>; 3 V after ten years) with small activation energy (0.35 eV up to 200 °C), thus showing promise for future high-temperature memory applications. A model implying valence-band electron tunneling and a floating-gate-like approximation is used to explain the memory window improvement of the Si-nc double-layer memory devices.
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Multilevel charge storage in silicon nanocrystal multilayers
Tiezheng Lu, Marin Alexe, R. Scholz et al. · Applied Physics Letters · 2005 · 144 citations