IEEE Transactions on Electron Devices · 2002 · 127 citations · 13 references
EngineeringElectrical EngineeringMaterials ScienceMicroelectronicsSemiconductor DevicesSemiconductor MaterialsDevice ScalingMemory DevicesNanoelectronicsQuantum ConfinementQuantum DotsSemiconductor PhysicsCoulomb BlockadeElectronic TransportFloating-gate MemoryNanoelectronic Memory DevicesQuantum Confinement EffectsQuantum Dot DevicesSemiconductor Quantum DotsThin-film Oxides
We propose a novel Si dot memory whose floating gate consists of self-aligned doubly stacked Si dots. A lower Si dot exists immediately below an upper dot and lies between thin tunnel oxides. It is experimentally shown that charge retention is improved compared to the usual single-layer Si dot memory. A theoretical model considering quantum confinement and Coulomb blockade in the lower Si dot explains the experimental results consistently, and shows that charge retention is improved exponentially by lower dot size scaling. It is shown that the retention improvement by lower dot scaling is possible, keeping the same write/erase speed as single dot memory, when the tunnel oxide thickness is adjusted simultaneously.
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A silicon nanocrystals based memory
Sandip Tiwari, Farhan Rana, Hussein Hanafi et al. · Applied Physics Letters · 1996 · 1.6K citations
Volatile and non-volatile memories in silicon with nano-crystal storage
S. Tiwari, Farhan Rana, K. Chan et al. · 2002 · 200 citations