IEEE Electron Device Letters · 2006 · 22 citations · 6 references
EngineeringElectrical EngineeringMaterials ScienceMicroelectronicsSemiconductor DevicesSemiconductor MaterialsComplementary Metal-oxide-semiconductor TechnologyHigh-frequency Semiconductor DevicesMetal-oxide-semiconductor Field-effect TransistorsSemiconductor Thin FilmsStrain EngineeringThin Film StrainCapacitanceFully Depleted Silicon-on-insulator TransistorsGate Oxide DegradationLinersSilicon-on-insulator CmosSilicon-on-insulator TechnologyStress-induced BehaviorUniaxial Strain
Ultrahigh performance fully depleted nMOSFETs have been fabricated on ultra-thin silicon-on-insulator (UTSOI) with a body thickness of 18 nm and channel lengths down to 20 nm. Uniaxial tensile stress induced in the channel using stressed contact liners and stress memorization was found to significantly improve ac performance, resulting in cutoff frequencies f/sub t/ as high as 330 GHz. This is the highest f/sub T/ value reported on fully depleted UTSOI MOSFETs and is among the highest f/sub T/ values for any Si-based field-effect transistor. Stress memorization and stressed contact liners were found to have little impact on gate to source capacitance indicating that the enhancement in f/sub T/ results primarily from stress-induced enhancements in transconductance.
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Novel locally strained channel technique for high performance 55nm CMOS
K. Ota, Kenya Sugihara, H. Sayama et al. · 2003 · 94 citations