H. Sayama

Novel locally strained channel technique for high performance 55nm CMOS

K. Ota, Kenya Sugihara, H. Sayama et al. · 2003 · 93 citations

Low-power Electronics, Electrical Engineering, Channel Technique +12

Effect of >100< channel direction for high performance SCE immune pMOSFET with less than 0.15 μm gate length

H. Sayama, Y. Nishida, H. Oda et al. · 2003 · 24 citations

Low-power Electronics, Electrical Engineering, Current Drivability +11

Novel SOI wafer engineering using low stress and high mobility CMOSFET with >100<-channel for embedded RF/analog applications

Takeru Matsumoto, S. Maeda, Hung Dang et al. · 2003 · 23 citations

Low-power Electronics, Electrical Engineering, Engineering +14

Soft error susceptibility and immune structures in dynamic random access memories (DRAMs) investigated by nuclear microprobes

M. Takai, T. Kishimoto, Yutaka Ohno et al. · IEEE Transactions on Nuclear Science · 1996 · 18 citations

Non-volatile Memory, Engineering, Molecular Biology +19

Charge Collection Control Using Retrograde Well Tested by Proton Microprobe Irradiation

H. Sayama, Hiroshi Kimura, Yoshikazu Ohno et al. · Japanese Journal of Applied Physics · 1993 · 17 citations

Soft Error Reduction, Electrical Engineering, Ion Implantation +11