H. Oda

Novel locally strained channel technique for high performance 55nm CMOS

K. Ota, Kenya Sugihara, H. Sayama et al. · 2003 · 93 citations

Low-power Electronics, Electrical Engineering, Channel Technique +12

Smallest V<inf>th</inf> variability achieved by intrinsic silicon on thin BOX (SOTB) CMOS with single metal gate

Yukinori Morita, Ryuta Tsuchiya, Takashi Ishigaki et al. · 2008 · 73 citations

Engineering, Thin Box, Silicon On Insulator +16

Ultra-low power and ultra-low voltage devices and circuits for IoT applications

Toshiro Hiramoto, Ken Takeuchi, T. Mizutani et al. · 2016 · 31 citations

Engineering, Ultra-low Voltage Devices, High Voltage Engineering +17

Three-dimensional topography simulation model: etching and lithography

M. Fujinaga, N. Kotani, T. Kunikiyo et al. · IEEE Transactions on Electron Devices · 1990 · 30 citations

Engineering, Electron-beam Lithography, Microscopy +17

Source-to-drain breakdown voltage improvement in ultrathin-film SOI MOSFET's using a gate-overlapped LDD structure

Yutaro Yamaguchi, T. Iwamatsu, H.-O. Joachim et al. · IEEE Transactions on Electron Devices · 1994 · 25 citations

Semiconductor Technology, Electrical Engineering, Engineering +10