Smallest V<inf>th</inf> variability achieved by intrinsic silicon on thin BOX (SOTB) CMOS with single metal gate

Abstract

A ldquosilicon on thin BOXrdquo (SOTB) CMOS with a 50-nm single metal (FUSI) gate has been developed. By employing an intrinsic channel and a metal gate, this SOTB achieves the smallest V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> variability ever reported. The measured Pelgrom coefficients of the SOTB were 1.8 and 1.5 for NMOS and PMOS, respectively, even in the case of relatively thick EOT of 1.9 nm. Both multi-V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> control as well as suppression of short-channel effects were carried out simply by adjusting the impurity concentration beneath the BOX layer while keeping the channel almost intrinsic. Inverter delay and off-current were optimized by controlling gate-overlap length by means of a dual-layer offset spacer. It is shown that, within planar-type low-power CMOS devices, the SOTB is the most scalable because of its capability of multi-V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> and excellent matching characteristics.