H.-O. Joachim

Simulation and two-dimensional analytical modeling of subthreshold slope in ultrathin-film SOI MOSFETs down to 0.1 mu m gate length

H.-O. Joachim, Yutaro Yamaguchi, K. Ishikawa et al. · IEEE Transactions on Electron Devices · 1993 · 67 citations

Device Modeling, Modified Boundary Condition, Electrical Engineering +15

Source-to-drain breakdown voltage improvement in ultrathin-film SOI MOSFET's using a gate-overlapped LDD structure

Yutaro Yamaguchi, T. Iwamatsu, H.-O. Joachim et al. · IEEE Transactions on Electron Devices · 1994 · 25 citations

Semiconductor Technology, Electrical Engineering, Engineering +10

A 32-Mb chain FeRAM with segment/stitch array architecture

S. Shiratake, Teppei Miyakawa, Yoshinori Takeuchi et al. · IEEE Journal of Solid-State Circuits · 2003 · 17 citations

32-Mb Chain Feram, Engineering, Small Cell Size +18

New highly scalable 3 dimensional chain FeRAM cell with vertical capacitor

N. Nagel, R. Bruchhaus, K. Hornik et al. · 2004 · 14 citations

Non-volatile Memory, Engineering, Ferroelectric Random-access Memory +16

A method for the prediction of hot-carrier lifetime in floating SOI NMOSFETs

S. Maeda, Yasuo Yamaguchi, Il-Jung Kim et al. · IEEE Transactions on Electron Devices · 1997 · 10 citations

Device Modeling, Electrical Engineering, Engineering +15