Statistics
Publications
7
Citations
133
H-Index
7
Active since
2001
Affiliations
Toshiba (Japan)(Current)
Teppei Miyakawa is an author at Toshiba (Japan) specializing in memory circuit design, engineering, and memory subsystem design.
Publications per year
2001–2022
7
7
A 64Mb Chain FeRAM with Quad-BL Architecture and 200MB/s Burst Mode
Katsuhiko Hoya, D. Takashima, S. Shiratake et al. · 2006 · 23 citations
Engineering, Computer Engineering, Electrical Engineering +12
A 1.6GB/s DDR2 128Mb chain FeRAM with scalable octal bitline and sensing schemes
H. Shiga, D. Takashima, S. Shiratake et al. · 2009 · 19 citations
1–5 of 7