Zhibin Ren - Concepedia

Author

Zhibin Ren

IBM (United States)ORCID

Also Known As

Ren Zhi-bin, Ren Zhibin, Ren, Zhibin, Ren, Zirui, Z. Ren, Zeming Ren, Zhanyi Ren, Zhebo Ren, Zhi-bin Ren, Zhibin REN

155

Publications

4.2K

Citations

H-Index

Concepts

All Affiliations

IBM (United States)Purdue University West Lafayette IBM Research - Thomas J. Watson Research Center Harbin Institute of Technology Hitachi (Japan)

About

Zhibin Ren is an author at IBM (United States) specializing in engineering, microelectronics, and applied physics.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	26	44	3.6K
2	Medicine	3	3	71
3	Education	1	1	14
4	Health Sciences	1	1	14
5	Natural Sciences	1	1	81

Zhibin Ren

Publications

Citations

H-Index

Page 1

	Year	Citations
Essential physics of carrier transport in nanoscale MOSFETs Mark Lundstrom, Zhibin Ren IEEE Transactions on Electron Devices Device ModelingElectrical EngineeringEngineeringPhysicsNanotechnology	2002	554
Six-band k⋅p calculation of the hole mobility in silicon inversion layers: Dependence on surface orientation, strain, and silicon thickness Massimo V. Fischetti, Zhibin Ren, P. M. Solomon, Journal of Applied Physics Materials ScienceSurface CharacterizationEngineeringSi ThicknessPhysics	2003	475
Simulating quantum transport in nanoscale transistors: Real versus mode-space approaches R. Venugopal, Zhibin Ren, Supriyo Datta, Journal of Applied Physics Categoryquantum ElectronicsEngineeringDevice HamiltonianSemiconductorsQuantum Computing	2002	472
nanoMOS 2.5: A two-dimensional simulator for quantum transport in double-gate MOSFETs Zhibin Ren, R. Venugopal, Sebastien Goasguen, IEEE Transactions on Electron Devices EngineeringSo-called Buttiker ProbesDouble-gate MosfetsSemiconductor DeviceTwo-dimensional Simulator	2003	294
On the performance limits for Si MOSFETs: a theoretical study F. Assad, Zhibin Ren, Dragica Vasileska, IEEE Transactions on Electron Devices Device ModelingElectrical EngineeringBallistic TransconductanceEngineeringPerformance Limits	2000	229
Extreme scaling with ultra-thin Si channel MOSFETs B. Doris, M. Ieong, T. Kanarsky, Electrical EngineeringEngineeringTechnology ScalingNanoelectronicsApplied Physics	2003	181
High performance 14nm SOI FinFET CMOS technology with 0.0174&#x00B5;m<sup>2</sup> embedded DRAM and 15 levels of Cu metallization C-H. Lin, B. Greene, J. Cai,	2014	128
9.1 A 7nm 4-Core AI Chip with 25.6TFLOPS Hybrid FP8 Training, 102.4TOPS INT4 Inference and Workload-Aware Throttling Ankur Agrawal, Sae Kyu Lee, J. A. Silberman, EngineeringMachine LearningComputer ArchitectureLow-precision ComputationHardware Systems	2021	100
The ballistic nanotransistor: a simulation study Zhibin Ren, R. Venugopal, Supriyo Datta, EngineeringBallistic NanotransistorSemiconductor DeviceNanoelectronicsNanoscale Modeling	2002	96
Nanoscale MOSFETS: Physics, Simulation and Design Zhibin Ren Purdue e-Pubs (Purdue University System)	2006	93

Page 1