Hemispherical grained Si formation on in-situ phosphorus doped amorphous-Si electrode for 256 Mb DRAM's capacitor

Abstract

The cylindrical capacitor structure with hemispherical grained-Si (HSG-Si) described here reliably achieves a cell capacitance of 30 fF in a 0.4 /spl mu/m-high storage electrode with a cell area of a 0.72 /spl mu/m/sup 2/ for 256 Mbit dynamic random access memory. An HSG-Si formation technology using Si/sub 2/H/sub 6/-molecule irradiation and annealing enables control of the grain density and grain size of HSG-Si fabricated selectively on the whole surface of phosphorus-doped amorphous Si cylindrical electrodes.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>