Dynamic Random-access Memory Design
Dynamic Random-Access Memory Design is an academic concept referring to the systematic methodology of structuring and optimizing volatile semiconductor memory architectures that require periodic charge refreshment to retain data, distinguishing it from static or non-volatile memory design approaches.
340
Publications
12.8K
Citations
1.6K
Authors
243
Institutions
Publications per year
2017–2026
73
Parents
340
1–5 of 340
1.6K
9
h-index
6
h-index
5
h-index
IBM Research - Thomas J. Watson Research Center, United States
5 publications · 259 citations
5
h-index
5
h-index
1–5 of 1.6K
243
IBM (United States)
Armonk, United States
17 h-index
168 publications
6.1K citations
Hitachi (Japan)
Tokyo, Japan
17 h-index
108 publications
3.3K citations
Intel (United States)
Santa Clara, United States
14 h-index
67 publications
4.8K citations
Toshiba (Japan)
Tokyo, Japan
12 h-index
101 publications
1.9K citations
IBM Research - Thomas J. Watson Research Center
Yorktown Heights, United States
11 h-index
40 publications
1.2K citations
Mitsubishi Electric (Japan)
Tokyo, Japan
10 h-index
46 publications
811 citations
Texas Instruments (United States)
Dallas, United States
10 h-index
36 publications
1.1K citations
NEC (Japan)
Tokyo, Japan
9 h-index
53 publications
1.2K citations
1–8 of 243
32 publications · 1.5K citations
22
h-index
45 publications · 1.5K citations
22
h-index
13 publications · 670 citations
12
h-index
10 publications · 806 citations
10
h-index
8 publications · 631 citations
8
h-index
1–5