IEEE Electron Device Letters · 2003 · 12 citations · 6 references
EngineeringComputer EngineeringElectrical EngineeringElectronic MaterialsMicroelectronicsSemiconductor DevicesEmbedded Memory BlocksIntegrated Circuit DesignLeakage Power ReductionMemory DevicesShort-channel EffectsEnduranceEndurance CharacteristicsFlash Memory DevicesHot Carrier InjectionInterface Trap ReductionLeakage Current ReductionNon-volatile Cmos MemoryNon-volatile Memory Design
An efficient erase technique is presented for SONOS EEPROM cells, using the concomitant hot-hole injection (HHI) at the drain and the source. Electrons trapped during the programming are thus fully eliminated throughout the entire channel, securing thereby a satisfactory cell endurance behavior. Additionally in the present HHI scheme the voltage applied at the common bulk terminal enables efficient erase in the entire erase sector. Also, HHI is quantitatively shown much more efficient for erase, compared with Fowler-Nordheim (F-N) tunneling. Finally, the elimination of trapped electrons throughout the entire channel is shown crucial for achieving a satisfactory cell endurance behavior.
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NROM: A novel localized trapping, 2-bit nonvolatile memory cell
B. Eitan, Paolo Pavan, I. Bloom et al. · IEEE Electron Device Letters · 2000 · 547 citations · Full text
Engineering, Computer Engineering, Electrical Engineering +12
Michael White, Dennis A. Adams, Jianhui Bu · IEEE Circuits and Devices Magazine · 2000 · 399 citations
Engineering, Computer Engineering, Electrical Engineering +17