2003 · 11 citations · 4 references
EngineeringElectrical EngineeringMaterials ScienceElectronic MaterialsMicroelectronicsSemiconductor DevicesChip PackagingIntegrated Circuit DesignIntegrated Circuit FabricationMixed-signal IntegrationVery-large-scale Integration LayoutWafer BondingAdvanced PackagingEncapsulationFlip-chip BondingHigh-speed TransmissionOhmic ContactsSignal TransmissionThree-dimensional IntegrationWarpage
The chip-stacking technologies with the thin devices in hyperfine pitch realize both of the strong demands for the high-speed signal transmission and the high-density packaging. The results of the experiments on the non-metallurgical bonding and encapsulation with nonconductive particle paste (NCP) are introduced. It realizes void-free encapsulation of under 10-/spl mu/m-thick gap, small warpage of 50-/spl mu/m-thick chip, and ohmic contact of all of 1844 bumps in 20-/spl mu/m-pitch. Additionally, it is found the flatness of chip backside is achieved sufficient level for the thin chip stacking process with hyper fine pitch interconnection.
4
Future system-on-silicon LSI chips
Mitsumasa Koyanagi, H. Kurino, Kang Wook Lee et al. · IEEE Micro · 1998 · 336 citations
Engineering, Computer Engineering, Electrical Engineering +17