2003 · 11 citations · 2 references
EngineeringMaterials EngineeringMaterials ScienceElectronic MaterialsMicroelectromechanical SystemsSemiconductor DevicesChip PackagingIntegrated Circuit DesignIntegrated Circuit FabricationInterconnect DesignInterconnect TechnologyWafer BondingAdvanced PackagingFiller MaterialsFlip-chip BondingLarge Plastic StrainPlastic StrainPlastic Stress-strain RelationshipThree-dimensional IntegrationUnderfill Materials
The superfine flip-chip interconnection was evaluated on the chip on chip (COC) structure with the daisy chain patterns. The electroplated Au bumps allocated on the periphery of the Si chip in 20/spl mu/m-pitch were applied to the experiments. The underfill resin incorporated with the hyperfine filler particles achieved the acceptable reliability in the temperature cycling test (TCT) of the micro joints. The results showed no failure over 1,000 cycles with the optimized underfill resin. The finite element method (FEM) analysis found that the hyperfine filler particles in the underfill resin could reduce the equivalent plastic strain of micro-Au-bumps less than 1.0%, especially concentrated around the center of the interconnection at the bonding interface during TCT. In addition, the results in TCT with the optimized underfill resin were superior to the results with no underfill resin even as the results on COC structure. In case of the result with no underfill, it was found that the breakage occurred in the different mode as the results with the underfill resin, which was supposed from the dissimilar distribution of the strain due to the difference of the coefficient of thermal expansion (CTE) between the Au bumps and the Si devices.
2
Future system-on-silicon LSI chips
Mitsumasa Koyanagi, H. Kurino, Kang Wook Lee et al. · IEEE Micro · 1998 · 336 citations
Engineering, Computer Engineering, Electrical Engineering +17