IEEE Electron Device Letters · 1987 · 67 citations · 6 references
EngineeringElectrical EngineeringMicroelectronicsPower ElectronicsSemiconductor DevicesCarrier TransportDevice CharacterizationDevice ModelingDevice ReliabilityDevice SimulationSemiconductor ReliabilityCurrent Stress ReliabilityDegradationDevice DegradationHot Carrier EffectsHot Carrier InjectionHot-carrier DegradationReliability DegradationReliability Degradation Mechanisms
The effects of gate and drain voltage waveforms on the hot-carrier-induced MOSFET degradation are studied. Drain votage transients have little effect on the degradation rate. Only the falling edge of the gate pulse in the presence of a high drain voltage enhances the degradation rate. For devices in typical inverter circuits, dc stress results together with the substrate current waveform can predict the degradation rate under ac stress for a wide range of rise and delay times.
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