CMOS circuit technology for sub-ambient temperature operation

I. Aller, K. Bernstein, U. Ghoshal, H. Schettler, S.E. Schuster, Otto Torreiter

2002 · 19 citations · 4 references

Concepts

Abstract

Sub-ambient-temperature operation can remove important device scaling and circuit performance bottlenecks in sub-100 nm CMOS technologies. It permits scaling of supply voltages of high-speed circuits to sub-1 V by reducing the subthreshold currents and increasing the carrier mobility in the channels, lowers interconnection resistances significantly, and eliminates electromigration-related failure mechanisms. This paper analyzes the advantages of reduced temperature operation at the circuit level for server applications, while the accompanying paper describes refrigeration techniques for sub-ambient temperature operation.

References

4