S.E. Schuster

Power-aware microarchitecture: design and modeling challenges for next-generation microprocessors

Peter W. Cook, Manoj Gupta, Victor Zyuban et al. · IEEE Micro · 2000 · 506 citations

Engineering, Computer Engineering, Computer Science +17

1 µm MOSFET VLSI technology: Part IV—Hot-electron design constraints

T.H. Ning, Peter W. Cook, R.H. Dennard et al. · IEEE Transactions on Electron Devices · 1979 · 247 citations

Engineering, Computer Engineering, Electrical Engineering +17

Multiple word/bit line redundancy for semiconductor memories

S.E. Schuster · IEEE Journal of Solid-State Circuits · 1978 · 197 citations

Engineering, Computer Engineering, Electrical Engineering +14

Dynamically tuning processor resources with adaptive processing

David H. Albonesi, Rajeev Balasubramonian, S.G. Dropsbo et al. · Computer · 2003 · 157 citations · Full text

Engineering, Computer Engineering, Computer Science +17

A 2-ns cycle, 3.8-ns access 512-kb CMOS ECL SRAM with a fully pipelined architecture

T.I. Chappell, B.A. Chappell, S.E. Schuster et al. · IEEE Journal of Solid-State Circuits · 1991 · 122 citations

Engineering, Computer Engineering, Electrical Engineering +17