Damascene Process

The "Damascene Process" is a semiconductor fabrication technique that belongs to the class of interconnect formation methods, distinguished by its use of trench and via etching followed by metal deposition and chemical-mechanical polishing to create inlaid conductive patterns within a dielectric layer.

256

Publications

12K

Citations

1.4K

Authors

209

Institutions

Publications per year

2017–2026

33

Authors

1.4K

  1. TP
    Thomas P. Moffat

    National Institute of Standards and Technology, United States

    8 publications · 696 citations

    8

    h-index

  2. SC
    Shih-Chieh Chang

    National Tsing Hua University, Taiwan

    6 publications · 138 citations

    6

    h-index

  3. JJ
    Jae Jeong Kim

    Seoul National University, South Korea

    6 publications · 161 citations

    6

    h-index

  4. JS
    Jia‐Min Shieh

    National Institutes of Applied Research, Taiwan

    6 publications · 134 citations

    6

    h-index

  5. MT
    Masanori Tsukamoto

    Kyushu University, Japan

    6 publications · 152 citations

    6

    h-index

1–5 of 1.4K

Venues

  1. Journal of The Electrochemical Society

    JES · 28 publications · 1.3K citations

    20

    h-index

  2. 18

    h-index

  3. Japanese Journal of Applied Physics

    JJAP · 13 publications · 377 citations

    12

    h-index

  4. IEEE Electron Device Letters

    10 publications · 257 citations

    11

    h-index

  5. 10

    h-index

1–5