G. LaRosa

High Performance 45-nm SOI Technology with Enhanced Strain, Porous Low-k BEOL, and Immersion Lithography

P. Agnello, T. Ivers, C. Warm et al. · 2006 · 115 citations

Engineering, Vlsi Design, Enhanced Strain +21

Impact of E-E scattering to the hot carrier degradation of deep submicron NMOSFETs

Stewart E. Rauch, F Guarin, G. LaRosa · IEEE Electron Device Letters · 1998 · 85 citations

Semiconductor Technology, Deep Submicron Nmosfets, Electrical Engineering +13

Broad energy distribution of NBTI-induced interface states in p-MOSFETs with ultra-thin nitrided oxide

J. H. Stathis, G. LaRosa, A. Chou · 2004 · 38 citations

Electrical Engineering, Engineering, Physics +12

Oxygen vacancy traps in Hi-K/Metal gate technologies and their potential for embedded memory applications

C. Kothandaraman, X. Chen, D. Moy et al. · 2015 · 21 citations

Non-volatile Memory, Electrical Engineering, Oxygen Vacancy Traps +15

Intrinsic dielectric stack reliability of a high performance bulk planar 20nm replacement gate high-k metal gate technology and comparison to 28nm gate first high-k metal gate process

William E. McMahon, C. Tian, Suresh Uppal et al. · 2013 · 13 citations

Reliability, Electrical Engineering, Engineering +15