X. Chen

Reduced electromigration of Cu wires by surface coating

C.‐K. Hu, Lynne Gignac, R. Rosenberg et al. · Applied Physics Letters · 2002 · 215 citations

Natural Sciences, Electrical Engineering, Materials Engineering +17

Dual stress liner for high performance sub-45nm gate length SOI CMOS manufacturing

Haining Yang, R. Malik, Y. Li et al. · 2005 · 142 citations

Engineering, Electrical Engineering, Manufacturing Engineering +11

High Performance 45-nm SOI Technology with Enhanced Strain, Porous Low-k BEOL, and Immersion Lithography

P. Agnello, T. Ivers, C. Warm et al. · 2006 · 115 citations

Engineering, Computer Engineering, Electrical Engineering +17

A cost effective 32nm high-K/ metal gate CMOS technology for low power applications with single-metal/gate-first process

X. Chen, S. Samavedam, Vijay Narayanan et al. · 2008 · 113 citations

Engineering, Computer Engineering, Electrical Engineering +16

Reduced Cu interface diffusion by CoWP surface coating

C.‐K. Hu, Lynne Gignac, R. Rosenberg et al. · Microelectronic Engineering · 2003 · 109 citations

Natural Sciences, Materials Engineering, Materials Science +14