P. Coskina

Publications

129

Citations

H-Index

2000

Active since

Affiliations

Fraunhofer Institute for Reliability and Microintegration(Current)

P. Coskina is an author at Fraunhofer Institute for Reliability and Microintegration specializing in engineering, microfabrication, and electronic packaging.

Top concepts

EngineeringMicrofabricationElectronic PackagingMicroelectronicsComputer EngineeringElectrical EngineeringComputer Architecture3D PrintingVlsi DesignApplied Physics

Publications per year

2000–2002

Publications

Fab Integrated Packaging (FIP): a new concept for high reliability wafer-level chip size packaging

Michael J. Topper, J. Auersperg, V. Glaw et al. · 2000 · 40 citations

Electrical Engineering, Chip-scale Package, Engineering +13

Bump formation for flip chip and CSP by solder paste printing

J. Kloeser, P. Coskina, R. Aschenbrenner et al. · Microelectronics Reliability · 2002 · 30 citations

Materials Science, Flip Chip, Engineering +10

Wafer-level chip size package (WL-CSP)

Michael J. Topper, S. Fehlberg, K. Scherpinski et al. · IEEE Transactions on Advanced Packaging · 2000 · 30 citations

Electrical Engineering, Chip-scale Package, Engineering +12

Wafer level package using double balls

Michael J. Topper, V. Glaw, P. Coskina et al. · 2002 · 16 citations

Engineering, Industrial Engineering, Computer Architecture +16

Numerical and experimental investigations of large IC flip chip attach

Andreas Schubert, R. Dudek, R. Leutenbauer et al. · 2000 · 13 citations

Flip Chip Technology, Engineering, Vlsi Design +17

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