IEEE Transactions on Electron Devices · 2024 · 13 citations · 27 references
EngineeringElectrical EngineeringMaterials EngineeringMicroelectronicsSemiconductor DevicesSemiconductor MaterialsAtomic Layer DepositionCarrier TransportDevice ScalingOxide SemiconductorsSemiconductor Device MaterialsSemiconductor PhysicsCarrier Transport MechanismsCarrier Transport ModelingDevice Scaling EffectsDevice VariabilityElectrical Transport PropertiesNanoelectronic Device PhysicsThreshold VoltageThreshold Voltage Scaling
We have investigated the scaling potential of nanosheet oxide semiconductor FETs (NS OS FETs) for monolithic 3-D (M3D) integration in terms of atomic layer deposition (ALD) material engineering, high-field transport, and statistical variability. We have developed and systematically compared InGaO (IGO), InZnO (IZO), and InGaZnO (IGZO) FETs by ALD. The effective mobility (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu _{\text {eff}}$ </tex-math></inline-formula>) characteristics of IGZO are higher than that of IGO and IZO at the same threshold voltage (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {th}}$ </tex-math></inline-formula>) in the normally-off region (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {th}} \gt 0$ </tex-math></inline-formula>). IGZO benefits from high <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu _{\text {eff}}$ </tex-math></inline-formula> of IZO and low oxygen vacancy (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {o}}$ </tex-math></inline-formula>) of IGO and thus shows well-balanced characteristics. To study the carrier transport characteristics under a high electrical field, we have fabricated sub-100 nm gate length NS OS FETs and extracted transconductance (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${g}_{\text {m}}$ </tex-math></inline-formula>) as a metric. While bulk Si FETs show velocity saturation behavior even after parasitic correction, NS OS FETs show unsaturated velocity behavior. We also have obtained statistical variability data of NS OS FETs, which is comparable against bulk Si nFETs and Si SOI nFETs. This work provides evidence of the scalability of NS OS FETs for M3D integration.
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