IEEE Electron Device Letters · 2018 · 104 citations · 28 references
EngineeringElectrical EngineeringPhysicsMicroelectronicsSemiconductor DevicesSemiconductor MaterialsCurrent-voltage CharacteristicsIii-v SemiconductorsMetal-oxide-semiconductor Field-effect TransistorsSemiconductor DefectsSemiconductor PhysicsCharge TrappingCharge TrapsTrap CharacterizationTrap LevelsTrapping Effects
Threshold voltage instability was observed on β-Ga <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> transistors using double-pulsed current-voltage and constant drain current deep level transient spectroscopy (DLTS) measurements. A total instability of 0.78 V was attributed to two distinct trap levels, at E <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C</sub> -0.70 and E <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C</sub> -0.77 eV, which need to be mitigated for future applications. The traps are likely located near the gate-drain edge and below the delta-doped layer, which is determined through the DLTS technique and an understanding of the fill and empty biasing conditions. The trap modulation was consistent with a gate leakage-based trap filling mechanism, which was demonstrated. It is likely that Fe is playing a role in the observed dispersion due to the close proximity of the Fe substrate.
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