Stacked Ge-Nanosheet GAAFETs Fabricated by Ge/Si Multilayer Epitaxy

Abstract

Horizontally stacked Ge-nanosheet gate-all-around FETs (GAAFETs) are demonstrated for the first time. The Ge/Si multilayers instead of the typically used Ge/SiGe ones were epitaxially grown as the starting material. To avoid island growth, the Ge/Si multilayers were epitaxially grown at a low temperature. Using megasonic agitation, the Si in Ge/Si multilayers can be easily etched with good selectivity using a tetramethylammonium hydroxide water solution at an appropriate temperature. Finally, the p- and n-GAAFETs of gate length (L <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</sub> ) 90 nm were fabricated, and drive currents I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> of 1650 and 1510 μA/μm (per width of channel footprint) were achieved, respectively.