Terence B. Hook

Stacked nanosheet gate-all-around transistor to enable scaling beyond FinFET

N. Loubet, Terence B. Hook, P. Montanini et al. · 2017 · 939 citations

Engineering, Nanocomputing, Semiconductor Device +17

Power and Technology Scaling into the 5 nm Node with Stacked Nanosheets

Terence B. Hook · Joule · 2017 · 391 citations · Full text

Materials Science, Electrical Engineering, Nanoscale System +12

Performance trade-offs in FinFET and gate-all-around device architectures for 7nm-node and beyond

Seong-Dong Kim, Michael Guillorn, Isaac Lauer et al. · 2015 · 140 citations

Engineering, Vlsi Design, Computer Architecture +20

A 7nm FinFET technology featuring EUV patterning and dual strained high mobility channels

Ruijie Xie, P. Montanini, Kerem Akarvardar et al. · 2016 · 139 citations

Engineering, Electron-beam Lithography, Finfet Technology +18

Lateral ion implant straggle and mask proximity effect

Terence B. Hook, J. Brown, P.E. Cottrell et al. · IEEE Transactions on Electron Devices · 2003 · 99 citations

Device Modeling, Mask Proximity Effect, Electrical Engineering +14