FinFET Architecture Analysis and Fabrication Mechanism

Abstract

In view of difficulties of the planar MOSFET technology to get the acceptable gate control over the channel FinFET technology based on multiple gate devices is better technology option for further shrinking the size of the planar MOSFET [1]. For double gate SOI- MOSFET the gates control the channel created between source and drain terminal effectively. So the several short channel effects like DIBL, subthreshold swing, gate leakage current etc. without increasing the carrier concentration into the channel. This paper mainly deals with detail description about the DG MOSFET structure and its particular type named as FinFET technology and its fabrication mechanism is also described. Below the 50nm technology FinFET has better controlling over the several short channel effects. In section one the introduction is given, section two describe the