Review of FINFET technology

Abstract

In view of the difficulties in planar CMOS transistor scaling to preserve an acceptable gate to channel control FINFET based multi-gate (MuGFET) devices have been proposed as a technology option for replacing the existing technology. The attractiveness of FINFET consists in the realization of self-aligned double-gate devices with a conventional CMOS process. This allows extending the gate scaling beyond the planar transitor limits, maintaining a steep subthreshold slope, better performance with bias voltage scaling and good matching due to low doping concentration in the channel. There are, however, several challenges and roadblocks that FINFET technology has to face to be competitive with other technology options: high access resistance related to the extremely thin body, V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">tau</sub> setting, implementation of strain boosters and manufacturability related to the non planar process and very tight process control.