IEEE Transactions on Electron Devices · 1989 · 27 citations · 21 references
EngineeringElectrical EngineeringMaterials ScienceElectronic MaterialsSemiconductor DevicesSemiconductor MaterialsDopingIntegrated Circuit DevicesMetal-oxide-semiconductor Field-effect TransistorsP-n JunctionsSemiconductor Device MaterialsSemiconductor InterfacesInterfacial Oxide FormationInterfacial Oxide GrowthInterfacial Oxide LayersPolysiliconPost-deposition Annealing
In-situ boron-doped polysilicon has been used to form the emitter in p-n-p transistors. Various polysilicon deposition conditions, interface preparation treatments prior to deposition, and post-deposition anneals were investigated. Unannealed devices lacking a deliberately grown interfacial oxide gave effective emitter Gummel numbers G/sub E/ of 7-9*10/sup -12/s cm/sup -4/ combined with emitter resistances R/sub E/ of approximately 8 mu Omega cm/sup 2/. Introduction of a chemically grown interfacial oxide increased G/sub E/ to 2*10/sup 14/s cm/sup -4/, but also raised R/sub E/ by a factor of three. Annealing at 900 degrees C following polysilicon deposition raised G/sub E/ values for transistors lacking deliberate interfacial oxide to approximately 6*10/sup 13/s cm/sup -4/, but had little effect of G/sub E/ for devices with interfacial oxide. Both types of annealed devices gave R/sub E/ values in the range 1-2 mu Omega cm/sup 2/.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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Dopant segregation in polycrystalline silicon
Mohammad M. Mandurah, Krishna C. Saraswat, C. R. Helms et al. · Journal of Applied Physics · 1980 · 371 citations