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Highly scalable hafnium oxide memory with improvements of resistive distribution and read disturb immunity
200
Citations
5
References
2009
Year
Unknown Venue
Non-volatile MemoryEngineeringEmerging Memory TechnologyComputer ArchitectureIntegrated CircuitsNanoelectronicsMemory DeviceMemory DevicesLow ResistanceResistive DistributionKb ArrayElectrical EngineeringHighly Scalable HafniumScaling FeasibilityMicroelectronicsMemory ArchitectureDisturb ImmunityApplied PhysicsSemiconductor MemoryResistive Random-access Memory
A 30×30 nm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> resistance random access memory (RRAM) with excellent electrical performances is demonstrated for the scaling feasibility in this work. A 1 Kb one transistor and one resistor (1T1R) array with robust characteristics was also fabricated successfully. The device yield of the 1 Kb array is 100%, and the endurance for these devices can exceed 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sup> cycles by a pulse width of 40 ns. Two effective verification methods, which make a tight distribution of high resistance (R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">HIGH</sub> ) and low resistance (R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LOW</sub> ) are proposed for the array to ensure a good operation window. A thin AlO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> buffer layer under the HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> layer was adopted to enhance the read disturb immunity. Without large parasitic capacitance, the 1T1R RRAM devices exhibit excellent program (PGM)/erase (ERS) disturb immunity.
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