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Low power and high speed bipolar switching with a thin reactive Ti buffer layer in robust HfO2 based RRAM
619
Citations
7
References
2008
Year
Unknown Venue
Non-volatile MemoryEngineeringMemory DesignEmerging Memory TechnologyReactive Buffer LayerIntegrated CircuitsPhase Change MemoryNanoelectronicsMemory DeviceMemory DevicesElectrical EngineeringElectronic MemoryMicroelectronicsHigh SpeedMemory ReliabilityRobust Hfo2Low PowerApplied PhysicsSemiconductor MemoryTin ElectrodesResistive Random-access Memory
A novel HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> -based resistive memory with the TiN electrodes is proposed and fully integrated with 0.18 mum CMOS technology. By using a thin Ti layer as the reactive buffer layer into the anodic side of capacitor-like memory cell, excellent memory performances, such as low operation current (down to 25 muA), high on/off resistance ratio (above 1,000), fast switching speed (5 ns), satisfactory switching endurance (>10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sup> cycles), and reliable data retention (10 years extrapolation at 200degC) have been demonstrated in our memory device. Moreover, the benefits of high yield, robust memory performance at high temperature (200degC), excellent scalability, and multi-level operation promise its application in the next generation nonvolatile memory.
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