Publication | Closed Access
A 5ns fast write multi-level non-volatile 1 K bits RRAM memory with advance write scheme
79
Citations
0
References
2009
Year
Unknown Venue
Non-volatile MemoryEngineeringEmerging Memory TechnologyComputer ArchitectureMulti-channel Memory ArchitectureAdvance Write SchemeRram CellMemory DeviceMemory DevicesParallel ComputingElectrical EngineeringElectronic MemoryComputer EngineeringMagnetoresistive Random-access MemoryMicroelectronicsHigh SpeedMemory ArchitectureMemory Reliability1-Kb Hfo 2Semiconductor MemoryResistive Random-access Memory
A 1-Kb HfO 2 based RRAM for high speed nonvolatile memory application is proposed. With this chip, a high speed write characteristic in the RRAM cell can be achieved. The present circuit design includes a 1T1R RRAM (1 transistor/1 resistive memory) cell and a voltage write circuit, which limit the current through the memory cell. The random write time at VDD = 3.3V is as fast as 5 ns in the RRAM, which were fabricated with a 0.18 µm TSMC process.