Shyh-Shyuan Sheu

A 4Mb embedded SLC resistive-RAM macro with 7.2ns read-write random-access time and 160ns MLC-access capability

Shyh-Shyuan Sheu, Meng‐Fan Chang, Ku-Feng Lin et al. · 2011 · 245 citations

Hardware Security, Mlc-access Capability, Electrical Engineering +15

16.3 A 28nm 384kb 6T-SRAM Computation-in-Memory Macro with 8b Precision for AI Edge Chips

Jian-Wei Su, Yen-Chi Chou, Ruhui Liu et al. · 2021 · 184 citations

Engineering, Computer Architecture, Multi-channel Memory Architecture +18

15.2 A 28nm 64Kb Inference-Training Two-Way Transpose Multibit 6T SRAM Compute-in-Memory Macro for AI Edge Chips

Jian-Wei Su, Xin Si, Yen-Chi Chou et al. · 2020 · 178 citations

Engineering, Edge Device, Computer Architecture +21

Low Store Energy, Low VDDmin, 8T2R Nonvolatile Latch and SRAM With Vertical-Stacked Resistive Memory (Memristor) Devices for Low Power Mobile Applications

Pi-Feng Chiu, Meng‐Fan Chang, Che-Wei Wu et al. · IEEE Journal of Solid-State Circuits · 2012 · 159 citations

A 28nm 1Mb Time-Domain Computing-in-Memory 6T-SRAM Macro with a 6.6ns Latency, 1241GOPS and 37.01TOPS/W for 8b-MAC Operations for Edge-AI Devices

Ping-Chun Wu, Jian-Wei Su, Yen-Lin Chung et al. · 2022 IEEE International Solid- State Circuits Conference (ISSCC) · 2022 · 125 citations

Engineering, Emerging Memory Technology, Computer Architecture +21