Xin Si - Concepedia

Author

Xin Si

National Tsing Hua University ORCID

Also Known As

Si, Xin, Xin Si

Publications

2.8K

Citations

H-Index

Concepts

All Affiliations

National Tsing Hua University University of Electronic Science and Technology of China Southeast University Industrial Technology Research Institute Tsinghua University

About

Xin Si is an author at National Tsing Hua University specializing in computer engineering, computer architecture, and engineering.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	21	23	2.3K
2	Computer Engineering	21	23	2.3K
3	Health Sciences	1	1	24
4	Social Sciences	1	1	40
5	Applied Physics	1	1	132

Xin Si

Publications

2.6K

Citations

H-Index

Page 1

	Year	Citations
24.5 A Twin-8T SRAM Computation-In-Memory Macro for Multiple-Bit CNN-Based Machine Learning Xin Si, Jiajing Chen, Yung-Ning Tu, Binary Mac OperationsEngineeringMachine LearningHardware AccelerationEnergy Efficiency	2019	251
A 65nm 4Kb algorithm-dependent computing-in-memory SRAM unit-macro with 2.3ns and 55.8TOPS/W fully parallel product-sum operation for binary DNN edge processors Win-San Khwa, Jiajing Chen, Jiafang Li, EngineeringComputer ArchitectureMulti-channel Memory ArchitectureHigh-performance ArchitectureSparse Neural Network	2018	240
A Twin-8T SRAM Computation-in-Memory Unit-Macro for Multibit CNN-Based AI Edge Processors Xin Si IEEE Journal of Solid-State Circuits	2019	212
15.5 A 28nm 64Kb 6T SRAM Computing-in-Memory Macro with 8b MAC Operation for AI Edge Chips Xin Si, Yung-Ning Tu, Wei-Hsing Huang, EngineeringMac OperationsHardware AccelerationEdge ComputingHigh-performance Architecture	2020	208
16.3 A 28nm 384kb 6T-SRAM Computation-in-Memory Macro with 8b Precision for AI Edge Chips Jian-Wei Su, Yen-Chi Chou, Ruhui Liu, EngineeringComputer ArchitectureMulti-channel Memory ArchitectureHigh-performance ArchitectureComputing Systems	2021	184
15.2 A 28nm 64Kb Inference-Training Two-Way Transpose Multibit 6T SRAM Compute-in-Memory Macro for AI Edge Chips Jian-Wei Su, Xin Si, Yen-Chi Chou, EngineeringEdge DeviceComputer ArchitectureTwt Multiply CellSram Compute-in-memory Macro	2020	178
A Dual-Split 6T SRAM-Based Computing-in-Memory Unit-Macro With Fully Parallel Product-Sum Operation for Binarized DNN Edge Processors Xin Si, Meng‐Fan Chang, Win-San Khwa, IEEE Transactions on Circuits and Systems I Regular Papers Artificial IntelligenceEngineeringAdvanced ComputingNeural NetworkComputer Architecture	2019	147
14.3 A 65nm Computing-in-Memory-Based CNN Processor with 2.9-to-35.8TOPS/W System Energy Efficiency Using Dynamic-Sparsity Performance-Scaling Architecture and Energy-Efficient Inter/Intra-Macro Data Reuse Jinshan Yue, Zhe Yuan, Xiaoyu Feng, EngineeringMachine LearningMemory MacroComputer ArchitectureSpeech Recognition	2020	136
A computing-in-memory macro based on three-dimensional resistive random-access memory Qiang Huo, Yang Yi-ming, Yiming Wang, Nature Electronics Non-volatile MemoryEngineeringEnergy EfficiencyEmerging Memory TechnologyComputer Architecture	2022	132
A Local Computing Cell and 6T SRAM-Based Computing-in-Memory Macro With 8-b MAC Operation for Edge AI Chips Xin Si, Yung-Ning Tu, Wei-Hsing Huang, IEEE Journal of Solid-State Circuits EngineeringVlsi DesignProcess VariationEnergy EfficiencyEdge Device	2021	131

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