Yen-Lin Chung - Concepedia

Author

Yen-Lin Chung

National Tsing Hua University

Also Known As

Yen-Lin Chung

Publications

730

Citations

H-Index

Concepts

All Affiliations

National Tsing Hua University Industrial Technology Research Institute Tsinghua University Southeast University

About

Yen-Lin Chung is an author at National Tsing Hua University specializing in edge computing, engineering, and computer engineering.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	6	6	694
2	Computer Engineering	6	6	694
3	Computer Science	6	6	694
4	Electrical Engineering	5	5	510
5	Artificial Intelligence	1	1	61

Yen-Lin Chung

Publications

728

Citations

H-Index

Page 1

	Year	Citations
16.3 A 28nm 384kb 6T-SRAM Computation-in-Memory Macro with 8b Precision for AI Edge Chips Jian-Wei Su, Yen-Chi Chou, Ruhui Liu, EngineeringComputer ArchitectureMulti-channel Memory ArchitectureHigh-performance ArchitectureComputing Systems	2021	184
15.2 A 2.75-to-75.9TOPS/W Computing-in-Memory NN Processor Supporting Set-Associate Block-Wise Zero Skipping and Ping-Pong CIM with Simultaneous Computation and Weight Updating Jinshan Yue, Xiaoyu Feng, Yifan He, Simultaneous ComputationEngineeringComputer ArchitecturePrevious Cim ChipsHigh-performance Architecture	2021	146
A Local Computing Cell and 6T SRAM-Based Computing-in-Memory Macro With 8-b MAC Operation for Edge AI Chips Xin Si, Yung-Ning Tu, Wei-Hsing Huang, IEEE Journal of Solid-State Circuits EngineeringVlsi DesignProcess VariationEnergy EfficiencyEdge Device	2021	131
A 28nm 1Mb Time-Domain Computing-in-Memory 6T-SRAM Macro with a 6.6ns Latency, 1241GOPS and 37.01TOPS/W for 8b-MAC Operations for Edge-AI Devices Ping-Chun Wu, Jian-Wei Su, Yen-Lin Chung, 2022 IEEE International Solid- State Circuits Conference (ISSCC) EngineeringEmerging Memory TechnologyComputer ArchitectureEmbedded Systems8B-mac Operations	2022	125
Two-Way Transpose Multibit 6T SRAM Computing-in-Memory Macro for Inference-Training AI Edge Chips Jian-Wei Su, Xin Si, Yen-Chi Chou, IEEE Journal of Solid-State Circuits Artificial IntelligenceEngineeringEmerging Memory TechnologyComputer ArchitectureIntegrated Circuits	2021	61
A 8-b-Precision 6T SRAM Computing-in-Memory Macro Using Segmented-Bitline Charge-Sharing Scheme for AI Edge Chips Jian-Wei Su, Yen-Chi Chou, Ruhui Liu, IEEE Journal of Solid-State Circuits EngineeringVlsi DesignEnergy EfficiencyEmerging Memory TechnologyComputer Architecture	2022	47
An Energy-Efficient Computing-in-Memory NN Processor With Set-Associate Blockwise Sparsity and Ping-Pong Weight Update Jinshan Yue, Yongpan Liu, Xiaoyu Feng, IEEE Journal of Solid-State Circuits	2023	17
An 8b-Precision 6T SRAM Computing-in-Memory Macro Using Time-Domain Incremental Accumulation for AI Edge Chips Ping-Chun Wu, Jian-Wei Su, Yen-Lin Chung, IEEE Journal of Solid-State Circuits	2023	17

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