Identifying the Bottlenecks to the RF Performance of FinFETs

Abstract

In this work, the high frequency (RF) performance of FinFETs is investigated in detail using a two-level parasitic model comprising outer and inner parasitic capacitances in addition to parasitic series resistances. Use of scaling relations of these parasitic capacitances with numbers of fins and fingers allows extraction of these elements. Next, by defining a series of reference surfaces, each associated with a certain set of parasitic elements, we proceed to calculate the RF Figures of Merit, namely fT and fmax at these surfaces. These are called ‘available fT (fmax)’ in this work. Analysis of the available fT (fmax) gives insight into the extent to which different parasitics affect the FinFET’s RF performance. The main bottleneck to the FinFET’s RF performance is identified, solutions are proposed and relevant trade-offs are discussed.