IEEE Design & Test of Computers · 2008 · 27 citations · 11 references
EngineeringComputer ArchitectureTest Data GenerationSoftware EngineeringSoftware AnalysisModel-based TestingHardware SecurityMulticastTestbedParallel ComputingUniversal MulticastingTesting TechniqueTest QualityComputer EngineeringComputer ScienceDesign For TestingTest ManagementProgram AnalysisScan-based DesignsSoftware TestingUmc-scan Test Methodology
Industry has used scan-based designs widely to promote test quality. However, for larger designs, the growing test data volume has significantly increased test cost because of excessively long test times and elevated tester memory and external test channel requirements. To address these problems, researchers have proposed numerous test compression architectures. In this article, we propose a flexible scan test methodology called universal multicasting scan (UMC scan). It has three major features: First, it provides a better than state-of-the-art test compression ratio using multicasting. Second, it accepts any existing test patterns and doesn't need ATPG support. Third, unlike most previous multicasting schemes that use mapping logic to partition the scan chains into hard configurations, UMC scan's compatible scan chain groups are defined by control bits, as in the segmented addressable scan (SAS) architecture. We have developed several techniques to reduce the extra control bits so that the overall test compression ratio can approach that of the ideal multicasting scheme.
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Janusz Rajski, Jerzy Tyszer, Mark Kassab et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2004 · 518 citations
Reducing test application time for full scan embedded cores
Ilker Hamzaoglu, J.H. Patel · 2003 · 335 citations
New Design, Engineering, Mem Testing +19
Using a single input to support multiple scan chains
Kuen-Jong Lee, Jih-Jeen Chen, Cheng-Hua Huang · 1998 · 195 citations