Scan Chain Testing

Scan Chain Testing is a built-in self-test methodology that enables the detection of faults in digital circuits by serially shifting test patterns into and out of flip-flops configured in a scan chain architecture.

200

Publications

8K

Citations

462

Authors

141

Institutions

Publications per year

2017–2026

15

Authors

462

  1. IP
    Irith Pomeranz

    University of Iowa, United States

    13 publications · 413 citations

    12

    h-index

  2. SR
    S.M. Reddy

    University of Iowa, United States

    12 publications · 466 citations

    12

    h-index

  3. KC
    Krishnendu Chakrabarty

    Duke University, United States

    9 publications · 427 citations

    9

    h-index

  4. BR
    Bruno Rouzeyre

    Laboratoire d'Informatique, de Robotique et de Microélectronique de Montpellier, France

    8 publications · 303 citations

    8

    h-index

  5. JR
    Janusz Rajski

    Mentor Technologies, United States

    8 publications · 517 citations

    8

    h-index

1–5 of 462

Venues

  1. 14

    h-index

  2. 10

    h-index

  3. IEEE Design & Test of Computers

    7 publications · 669 citations

    7

    h-index

  4. 4

    h-index

  5. Journal of Electronic Testing

    JETTA · 4 publications · 65 citations

    4

    h-index

1–5