IEEE Journal of Solid-State Circuits · 1980 · 54 citations · 7 references
EngineeringComputer EngineeringElectrical EngineeringMicroelectronicsSemiconductor DevicesVlsi DesignCmos Circuit DesignLow-noise Circuit DesignLow-power Digital Circuit DesignMemory DevicesMemory Subsystem DesignNoise In Semiconductor DevicesDynamic Random-access MemoryDynamic Random-access Memory DesignLow-power Memory ArchitectureMemory Circuit DesignNon-volatile Memory DesignOn-chip Memory DesignPower-efficient Memory DesignRandom Access Memory (Ram)
A 5 V-only 64K dynamic RAM is designed and fabricated using double poly-Si technology based on the 3 /spl mu/m design rule. The design features of this dynamic RAM are described. In particular, memory cell and S/N (signal/noise) designs are focused of a dynamic RAM with an on-chip bias generator. The device fabricated provides a typical access time of 120 ns and a 170 mW operating power, with minimized sense noise of less than 50 mV.
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A fault-tolerant 64K dynamic RAM
R.P. Cenker, D.G. Clemons, W.R. Huber et al. · 1979 · 66 citations
Engineering, Computer Engineering, Electrical Engineering +16