Application of compact HCI model to prediction of process effect in 28FDSOI technology

Abstract

A comprehensive study of HC reliability and process change variation for submicron fully depleted Silicon On Insulator (FDSOI) MOSFET's is presented. The different process variation within the FDSOI technology and their impact on HC degradation are examined (i.e. channel length L, Source/Drain resistance RSD, oxide thickness T <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ox</sub> , lightly-doped drain LDD). In order to prove its consistence, our energy driven model recently presented will be applied to the different process changes.