An analytical drain current model for dual material engineered cylindrical/surrounded gate MOSFET

High-performance fully depleted silicon nanowire (diameter /spl les/ 5 nm) gate-all-around CMOS devices

Navab Singh, Ajay Agarwal, L. K. Bera et al. · IEEE Electron Device Letters · 2006 · 639 citations

Engineering, Electrical Engineering, Materials Science +17

Scaling theory for cylindrical, fully-depleted, surrounding-gate MOSFET's

C. Auth, J.D. Plummer · IEEE Electron Device Letters · 1997 · 563 citations

Engineering, Electrical Engineering, Circuit Theory +14

Dual-material gate (DMG) field effect transistor

Haijiang Ou, J. M. Kuo, Ken K. Chin · IEEE Transactions on Electron Devices · 1999 · 493 citations

Engineering, Electrical Engineering, Materials Science +15

Dual work function metal gate CMOS technology using metal interdiffusion

I. Polishchuk, P. Ranade, Tsu-Jae King et al. · IEEE Electron Device Letters · 2001 · 176 citations

Engineering, Electrical Engineering, Materials Science +17

A mobility model for carriers in the MOS inversion layer

Ken Yamaguchi · IEEE Transactions on Electron Devices · 1983 · 124 citations

Engineering, Electrical Engineering, Microelectronics +13