Defect-based methodology for workload-dependent circuit lifetime projections - Application to SRAM

Abstract

Despite a number of recent advances made in understanding bias temperature instability (BTI), there is still no simple simulation methodology available which can capture the impact of BTI degradation on deeply scaled transistors, while incorporating the widely distributed defect parameters. We present a physics-based defect-controlled methodology for projecting defect property distributions into circuit lifetime and performance distributions. This methodology allows evaluating the entire population of traps (from fast to slow recoverable and permanent traps), which results in faster simulation and proper extrapolation towards long operating lifetimes.