Stuck-at Fault Testing

Stuck-At Fault Testing is a fault detection method in Built-In Self-Test that identifies permanent faults in digital circuits by verifying whether a signal line is permanently stuck at a logical high or low value, deviating from its intended functionality.

459

Publications

17.3K

Citations

867

Authors

275

Institutions

Publications per year

2017–2026

22

Authors

867

  1. SR
    S.M. Reddy

    University of Iowa, United States

    40 publications · 1.7K citations

    21

    h-index

  2. IP
    Irith Pomeranz

    University of Iowa, United States

    38 publications · 1.6K citations

    20

    h-index

  3. EM
    E.J. McCluskey

    Stanford University, United States

    19 publications · 851 citations

    15

    h-index

  4. NK
    Niraj K. Jha

    Princeton University, United States

    12 publications · 298 citations

    12

    h-index

  5. VD
    Vishwani D. Agrawal

    AT&T (United States), United States

    11 publications · 287 citations

    11

    h-index

1–5 of 867

Venues

  1. 25

    h-index

  2. IEEE Transactions on Computers

    46 publications · 2K citations

    25

    h-index

  3. IEEE Design & Test of Computers

    15 publications · 1.2K citations

    15

    h-index

  4. 9

    h-index

  5. International Test Conference

    Conference · 8 publications · 325 citations

    8

    h-index

1–5