Concepedia

Latch-up Immunity

Latch-Up Immunity is a semiconductor design metric that denotes the inherent resistance of an integrated circuit to sustain destructive high-current states caused by parasitic thyristor activation due to electrostatic discharge events.

107

Publications

2.6K

Citations

406

Authors

102

Institutions

Publications per year

2017–2026

12

Parents

Publications

107

Correlation of picosecond laser-induced latchup and energetic particle-induced latchup in CMOS test structures

Steven C. Moss, S. D. LaLumondiere, J. Scarpulla et al. · IEEE Transactions on Nuclear Science · 1995 · 107 citations

, , +13

A New High Holding Voltage Dual-Direction SCR With Optimized Segmented Topology

Xiaozong Huang, Juin J. Liou, Zhiwei Liu et al. · IEEE Electron Device Letters · 2016 · 77 citations · Full text

, , +8

ESD protection solutions for high voltage technologies

B. Keppens, M. Mergens, Cong Son Trinh et al. · 2004 · 74 citations

, , +6

Silicon-Controlled Rectifier Stacking Structure for High-Voltage ESD Protection Applications

Zhiwei Liu, Juin J. Liou, Shurong Dong et al. · IEEE Electron Device Letters · 2010 · 69 citations · Full text

, , +9

A CMOS Structure with high latchup holding voltage

G.J. Hu, Richard H. Bruce · IEEE Electron Device Letters · 1984 · 59 citations

, , +11

1–5 of 107

Authors

406

  1. MK
    Ming‐Dou Ker

    National Yang Ming Chiao Tung University, Taiwan

    15 publications · 353 citations

    12

    h-index

  2. BZ
    Bo Zhang

    University of Electronic Science and Technology of China, China

    4 publications · 68 citations

    4

    h-index

  3. JJ
    Juin J. Liou

    University of Central Florida, United States

    4 publications · 195 citations

    4

    h-index

  4. YK
    Yong-Seo Koo

    Dankook University, South Korea

    4 publications · 72 citations

    4

    h-index

  5. CR
    Christian Russ

    Infineon Technologies (Germany), Germany

    4 publications · 173 citations

    4

    h-index

1–5 of 406

Institutions

102

  1. National Yang Ming Chiao Tung University

    Hsinchu, Taiwan

    14 h-index

    46 publications

    1K citations

  2. IBM (United States)

    Armonk, United States

    6 h-index

    20 publications

    368 citations

  3. University of Electronic Science and Technology of China

    Chengdu, China

    6 h-index

    45 publications

    1.1K citations

  4. Texas Instruments (United States)

    Dallas, United States

    6 h-index

    11 publications

    296 citations

  5. Infineon Technologies (Germany)

    Munich, Germany

    4 h-index

    7 publications

    190 citations

  6. Vanguard International Semiconductor (Taiwan)

    Hsinchu, Taiwan

    4 h-index

    10 publications

    183 citations

  7. Palo Alto Research Center

    Palo Alto, United States

    4 h-index

    16 publications

    491 citations

  8. National Engineering Research Center of Electromagnetic Radiation Control Materials

    Chengdu, China

    4 h-index

    35 publications

    926 citations

1–8 of 102

Venues

  1. IEEE Transactions on Electron Devices

    26 publications · 596 citations

    17

    h-index

  2. IEEE Electron Device Letters

    12 publications · 439 citations

    12

    h-index

  3. IEEE Transactions on Nuclear Science

    11 publications · 392 citations

    11

    h-index

  4. 5

    h-index

  5. Microelectronics Reliability

    3 publications · 84 citations

    3

    h-index

1–5