Ming‐Dou Ker - Concepedia

Author

Ming‐Dou Ker

National Yang Ming Chiao Tung University ORCID

Also Known As

Ker, Ming-Dou, M Ker, M. D. Ker, M. Ker, M.-D. KER, M.-D. Ker, M.D. Ker, Ming Dou Ker, Ming-Dou KER, Ming-Dou Ker

551

Publications

6.4K

Citations

H-Index

104

Concepts

All Affiliations

National Yang Ming Chiao Tung University I-Shou University Industrial Technology Research Institute Taiwan Semiconductor Manufacturing Company (Taiwan)ITRI International

About

Ming‐Dou Ker is an author at National Yang Ming Chiao Tung University specializing in engineering, electrical engineering, and microelectronics.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	36	172	4.8K
2	Social Sciences	6	6	224
3	Health Sciences	2	2	54
4	Medicine	2	2	52
5	Education	1	1	10

Ming‐Dou Ker

191

Publications

5.2K

Citations

H-Index

Page 1

	Year	Citations
Whole-chip ESD protection design with efficient VDD-to-VSS ESD clamp circuits for submicron CMOS VLSI Ming‐Dou Ker IEEE Transactions on Electron Devices Hardware SecurityLow-power ElectronicsElectrical EngineeringExperimental Test ChipEngineering	1999	307
Design of Charge Pump Circuit With Consideration of Gate-Oxide Reliability in Low-Voltage CMOS Processes Ming‐Dou Ker, S.-L. Chen, Chun-Hua Tsai IEEE Journal of Solid-State Circuits Low-power ElectronicsElectrical EngineeringEngineeringCircuit SystemBias Temperature Instability	2006	211
A Fully Integrated 16-Channel Closed-Loop Neural-Prosthetic CMOS SoC With Wireless Power and Bidirectional Data Telemetry for Real-Time Efficient Human Epileptic Seizure Control Cheng-Hsiang Cheng, Ping-Yuan Tsai, Tzu-Yi Yang, IEEE Journal of Solid-State Circuits Medical ElectronicsEngineeringNeuromodulation TherapiesEpileptic Seizure SuppressionBiomedical Engineering	2018	133
New Curvature-Compensation Technique for CMOS Bandgap Reference With Sub-1-V Operation Ming‐Dou Ker, Jung‐Sheng Chen IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing Low-power ElectronicsElectrical EngineeringEngineeringElectronic EngineeringMixed-signal Integrated Circuit	2006	110
Investigation of the gate-driven effect and substrate-triggered effect on ESD robustness of CMOS devices Tung-Yang Chen, Ming‐Dou Ker IEEE Transactions on Device and Materials Reliability Electrical EngineeringGate-driven EffectEngineeringVlsi DesignEmission Microscope	2001	89
A gate-coupled PTLSCR/NTLSCR ESD protection circuit for deep-submicron low-voltage CMOS ICs Ming‐Dou Ker, Hun-Hsien Chang, Chung‐Yu Wu IEEE Journal of Solid-State Circuits Hardware SecurityLow-power ElectronicsElectrical EngineeringEngineeringVlsi Design	1997	75
A High-Voltage-Tolerant and Precise Charge-Balanced Neuro-Stimulator in Low Voltage CMOS Process Zhicong Luo, Ming‐Dou Ker IEEE Transactions on Biomedical Circuits and Systems	2016	74
Methodology on extracting compact layout rules for latchup prevention in deep-submicron bulk CMOS technology Ming‐Dou Ker, Wen-Yu Lo IEEE Transactions on Semiconductor Manufacturing Hardware SecurityElectrical EngineeringPhysical Design (Electronics)EngineeringVlsi Design	2003	64
Overview on ESD Protection Designs of Low-Parasitic Capacitance for RF ICs in CMOS Technologies Ming‐Dou Ker, Chun‐Yu Lin, Yuan‐Wen Hsiao IEEE Transactions on Device and Materials Reliability Low-power ElectronicsElectrical EngineeringEngineeringVlsi DesignHigh-frequency Device	2011	62
Physical Mechanism and Device Simulation on Transient-Induced Latchup in CMOS ICs Under System-Level ESD Test Ming‐Dou Ker, S.-F. Hsu IEEE Transactions on Electron Devices Electrical EngineeringEngineeringVlsi DesignHardware-in-the-loop SimulationTransient-induced Latchup	2005	61

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