C.-H. Lin

Modeling Advanced FET Technology in a Compact Model

Mohan V. Dunga, C.-H. Lin, Xuemei Xi et al. · IEEE Transactions on Electron Devices · 2006 · 94 citations

Device Modeling, Electrical Engineering, New Technologies +12

Channel doping impact on FinFETs for 22nm and beyond

C.-H. Lin, R. Kambhampati, Robert J. Miller et al. · 2012 · 66 citations

A 0.063 µm<sup>2</sup> FinFET SRAM cell demonstration with conventional lithography using a novel integration scheme with aggressively scaled fin and gate pitch

V. Basker, T. Standaert, Hikaru Kawasaki et al. · 2010 · 60 citations

Novel Integration Scheme, Engineering, Vlsi Design +21

ETSOI CMOS for system-on-chip applications featuring 22nm gate length, sub-100nm gate pitch, and 0.08µm 2 SRAM cell

Kangguo Cheng, A. Khakifirooz, P. Kulkarni et al. · 2011 · 19 citations

Low-power Electronics, Electrical Engineering, Gate Length +14

Circuit performance of double-gate SOI CMOS

C.-H. Lin, Pin Su, Yee Hung See Tau et al. · 2004 · 14 citations

Low-power Electronics, Electrical Engineering, Engineering +13